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Octal 3-State Non-Inverting Transparent Latch

74HC573D
Photo of an SO 20 package.

$1.10

QTY Price
1 $1.10
10 $1.00
25 $0.90
100 $0.50

Description

The input level of 74HC573 Octal 3-State Non-Inverting Transparent Latch is CMOS level.

An 8-bit D-type transparent latch with 3-state outputs. The device features latch enable (LE) and output enable (OE) inputs. When LE is HIGH, data at the inputs enter the latches. In this condition the latches are transparent, a latch output will change each time its corresponding D-input changes. When LE is LOW the latches store the information that was present at the inputs at a set-up time preceding the HIGH-to-LOW transition of LE. A HIGH on OE causes the outputs to assume a high-impedance OFF-state. The operation of the OE input does not affect the state of the latches. Inputs include clamp diodes. This enables the use of current limiting resistors to interface inputs to voltages in excess of VCC.

Features

  • CMOS level
  • Wide supply voltage range from 2.0 to 6.0V
  • CMOS low power dissipation
  • High noise immunity
  • Common 3 state output enable input
  • Inputs and outputs on opposite sides of the package allow easy interface with microprocessors
  • Complies with JEDEC standard no. 7 A

Specifications

Operating Temperature

-40°C ~ 125°C

Supply Voltage Range

2 V ~ 6 V

Package

SO

Number of Terminals

20

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